Generally, before reading data in a memory cell in a dynamic random access memory (DRAM), a pair of bit lines is charged and equalized to a predetermined voltage value by pre-charge and equalization devices. The term “pre-charge” instead of “charge” is commonly used to indicate that charging the bit lines is prior to reading the memory cell. The value of the pre-charge and equalization voltage varies depending on the architecture of the DRAM. Examples of the pre-charge and equalization voltage values include reference voltage value VSS, operational voltage value VDD, voltage value VDD/2, etc. In some approaches, a supply voltage value VPP much higher than operational voltage value VDD is used to power the pre-charge and equalization devices so that sufficient voltage values for the pre-charge and equalization voltage is maintained. Otherwise, reading could result in inaccurate data. In some approaches, voltage VPP is provided by a supply voltage source used to activate the word line. Because of the high voltage value VPP, the power consumed by the pre-charge and equalization devices is high. Additionally, the pre-charge and equalization devices are designed so that the gate dielectric or gate oxide is thicker than that of a regular device to withstand the higher voltage value VPP. As the gate oxide becomes thicker, the size of the pre-charge and equalization devices becomes bigger, and the pre-charge and equalization devices run at a slower speed.
Like reference symbols in the various drawings indicate like elements.